A full adder adds three bits: A, B, and a carry in. Its two outputs count how many inputs are high, with CO worth two and S worth one.
Hint
CO is the majority of A, B, and CI. A gate with three pairs of N transistors in series pulls its output low while any two inputs are high, and its P strip can follow the same pattern. Follow it with an inverter.
Solution
This is the game's reference drawing for the puzzle. It meets the goal and passes the design rules. Other drawings can pass as well.
Top View of the solved die, captured from the game. Paths that carry a high level at the moment shown are lit. The Side View below cuts through the row between the dashed lines.The whole game window in Isometric View. The scope on the right compares each output with its target band, and the message above it confirms that the drawing passes.The solution on the grid. Squares are numbered from the top left corner, so you can count them. The dashed outline marks the squares you draw, change, or erase; the rest is drawn when the puzzle opens.
Legend
Metal384 squares
Polysilicon136 squares
Contact71 squares
N active47 squares
P active90 squares
N well159 squares
Metal 2297 squares
Via57 squares
Input padA, B, CI
Output padS, CO
Supply padVDD
Ground padGND
Squares you draw, change, or erase197 squares
About the drawing
The drawing uses 691 of the die's 1007 squares.
Part of the drawing is in place when the puzzle opens. To finish it, paint 128 empty squares and change 69 drawn squares.
It forms 34 transistors: 17 N transistors and 17 P transistors. Each one is a place where polysilicon crosses active silicon.
71 contacts join metal to the polysilicon or active silicon under it.
57 vias join metal 2 to the metal under it.
The drawing when the puzzle opens. The dashed outline marks the squares the solution changes.